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19-3662; Rev 0; 5/05
Push-Pull FET Driver with Integrated Oscillator and Clock Output
General Description
The MAX5075 is a +4.5V to +15V push-pull, current-fed topology driver subsystem with an integrated oscillator for use in telecom module power supplies. The device drives two MOSFETs connected to a center-tapped transformer primary providing secondary-side, isolated, negative or positive voltages. This device features a programmable, accurate, integrated oscillator with a synchronizing clock output that synchronizes an external PWM regulator. A single external resistor programs the internal oscillator frequency from 50kHz to 1.5MHz. The MAX5075 incorporates a dual MOSFET driver with 3A peak drive currents and 50% duty cycle. The MOSFET driver generates complementary signals to drive external ground-referenced n-channel MOSFETs. The MAX5075 is available with a clock output frequency to MOSFET driver frequency ratio of 1x, 2x, and 4x. The MAX5075 is available in a thermally enhanced 8-pin MAX (R) package and is specified over the -40C to +125C operating temperature range.
Features
Current-Fed, Push-Pull Driver Subsystem Programmable, Accurate Internal Oscillator Single +4.5V to +15V Supply Voltage Range Dual 3A Gate-Drive Outputs 1mA Operating Current at 250kHz with No Capacitive Load Synchronizing Clock Frequency Generation Options Thermally Enhanced 8-Pin MAX Package -40C to +125C Operating Temperature Range
MAX5075
Ordering Information
PART PINPACKAGE TOP MARK AAAU AAAV PKG CODE U8E-2 U8E-2 U8E-2 fCLK/fNDRV_ RATIO 1 2 4
Applications
Current-Fed, High-Efficiency Power-Supply Modules Power-Supply Building Subsystems Push-Pull Driver Subsystems
MAX is a registered trademark of Maxim Integrated Products, Inc. Pin Configuration appears at end of data sheet.
MAX5075AAUA 8 MAX-EP* MAX5075BAUA 8 MAX-EP*
MAX5075CAUA 8 MAX-EP* AAAW
*EP = Exposed paddle. Note: All devices specified for -40C to +125C operating temperature range.
Typical Operating Circuit
VIN VIN VOUT DRVH
PWM CONTROLLER
VCC VCC NDRV2
SYNCIN
CLK MAX5075 RT NDRV1
DRVL GND DGND I.C. PGND
GND
________________________________________________________________ Maxim Integrated Products
1
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Push-Pull FET Driver with Integrated Oscillator and Clock Output MAX5075
ABSOLUTE MAXIMUM RATINGS
VCC to DGND, PGND .............................................-0.3V to +18V CLK, RT to DGND.....................................................-0.3V to +6V NDRV1, NDRV2 to PGND...........................-0.3V to (VCC + 0.3V) DGND to PGND.....................................................-0.3V to +0.3V CLK Current......................................................................20mA NDRV1, NDRV2 Peak Current (200ns) ..................................5A NDRV1, NDRV2 Reverse Current (Latchup Current)......500mA Continuous Power Dissipation (TA = +70C) 8-Pin MAX (derate 10.3mW/C above +70C) ...........825mW Operating Temperature Range .........................-40C to +125C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +12V, RRT = 124k, NDRV1 = NDRV2 = open, TA = TJ = -40C to +125C, unless otherwise noted. Typical values are measured at TA = +25C.) (Note 1)
PARAMETER SUPPLY Input Voltage Supply Range Switching Supply Current Undervoltage Lockout UVLO Hysteresis OSCILLATOR Frequency Range Accuracy Oscillator Jitter CLK Output High Voltage CLK Output Low Voltage CLK Output Rise Time CLK Output Fall Time GATE DRIVERS (NDRV1, NDRV2) Output High Voltage Output Low Voltage Output Peak Current Driver Output Impedance Latchup Current Protection Rise Time Fall Time tR tF VOH VOL IP INDRV1 = INDRV2 = 100mA INDRV1 = INDRV2 = -100mA Sourcing and sinking NDRV_ sourcing 100mA NDRV_ sinking 100mA Reverse current at NDRV1/NDRV2 CLOAD = 2nF CLOAD = 2nF 3 1.8 1.6 400 10 10 3 2.6 VCC 0.3 0.3 V V A mA ns ns ICLK = 1mA ICLK = -1mA CCLK = 30pF CCLK = 30pF 35 10 7V VCC 15V 4.5V VCC 7V 4.1 3.5 fOSC (Note 2) fOSC = 250kHz , 6V VCC 15V (Note 3) 50 -8 0.6 5.0 5.0 50 1500 +10 kHz % % V mV ns ns VCC ICCSW VUVLO fOSC = 250kHz VCC rising 3 4.5 1 3.5 300 15.0 3 4 V mA V mV SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: The MAX5075 is 100% tested at TA = TJ = +125C. All limits over temperature are guaranteed by design. Note 2: Use the following formula to calculate the MAX5075 oscillator frequency: fOSC = 1012/(32 x RRT). Note 3: The accuracy of the oscillator's frequency is lower at frequencies greater than 1MHz.
2
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Push-Pull FET Driver with Integrated Oscillator and Clock Output MAX5075
Typical Operating Characteristics
(VCC = +12V, RRT = 124k, NDRV_ = open, CLK = open.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5075 toc01
SUPPLY CURRENT vs. CCLK
MAX5075 toc02
SUPPLY CURRENT vs. TEMPERATURE
1.18 1.16 SUPPLY CURRENT (mA) 1.14 1.12 1.10 1.08 1.06 1.04 1.02 1.00 fOSC = 250kHz
MAX5075 toc03
7 6 SUPPLY CURRENT (mA) 5 4 3 2 1 0 4 5 6 7 8 fOSC = 500kHz fOSC = 250kHz fOSC = 100kHz fOSC = 50kHz fOSC = 1.25MHz
1.50 1.45 1.40 SUPPLY CURRENT (mA) 1.35 1.30 1.25 1.20 1.15 1.10 1.05 1.00
RRT = 124k
1.20
9 10 11 12 13 14 15
0
20
40
60
80
100
-50
-25
0
25
50
75
100
125
SUPPLY VOLTAGE (V)
CCLK (pF)
TEMPERATURE (C)
CLK RISE TIME vs. SUPPLY VOLTAGE
MAX5075 toc04
CLK RISE TIME vs. TEMPERATURE
MAX5075 toc05
CLK FALL TIME vs. SUPPLY VOLTAGE
CCLK = 30pF
MAX5075 toc06
50 45 40 CLK RISE TIME (ns) 35 30 25 20 15 10 5 0 4 5 6 7 8 CCLK = 30pF
39.5 CCLK = 30pF 39.0 CLK RISE TIME (ns) 38.5 38.0 37.5 37.0 36.5
14 12 CLK FALL TIME (ns) 10 8 6 4 2 0
9 10 11 12 13 14 15
-50
-25
0
25
50
75
100
125
4
5
6
7
8
9 10 11 12 13 14 15
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
CLK FALL TIME vs. TEMPERATURE
MAX5075 toc07
OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE
RRT = 124k OSCILLATOR FREQUENCY (kHz) 254 252 250 248 246 TA = +125C 244 242 TA = +25C TA = -40C
MAX5075 toc08
12 CCLK = 30pF 10 CLK FALL TIME (ns) 8 6 4 2 0 -50 -25 0 25 50 75 100
256
125
4
5
6
7
8
9 10 11 12 13 14 15
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
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Push-Pull FET Driver with Integrated Oscillator and Clock Output MAX5075
Typical Operating Characteristics (continued)
(VCC = +12V, RRT = 124k, NDRV_ = open, CLK = open.)
OSCILLATOR FREQUENCY vs. RRT
MAX5075 toc09
NDRV FREQUENCY vs. CLK FREQUENCY
MAX5075 toc10
MAX5075A WAVEFORM
MAX5075 toc11
10,000 OSCILLATOR FREQUENCY (kHz)
800 700 NDRV FREQUENCY (kHz)
RRT = 124k NDRV1 5V/div
1000
MA X50 7
600 500 400 300 200 100
5A
M
AX
50
75
B
100
MA
X50
75C
NDRV2 5V/div
10 10 100 RRT (k) 1000
0 0 250 500 750 1000 1250 1500 2s/div CLK FREQUENCY (kHz)
CLK 5V/div
MAX5075B WAVEFORM
MAX5075 toc12
MAX5075C WAVEFORM
MAX5075 toc13
RRT = 124k NDRV1 5V/div
RRT = 124k NDRV1 5V/div
NDRV2 5V/div
NDRV2 5V/div
CLK 5V/div 2s/div 4s/div
CLK 5V/div
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Push-Pull FET Driver with Integrated Oscillator and Clock Output
Pin Description
PIN 1 2 3 4 5 6 7 8 EP NAME CLK I.C. RT DGND PGND NDRV1 NDRV2 VCC EP FUNCTION Synchronizing Clock Output. Clock output with a 10mA peak current drive that can be used to synchronize an external PWM regulator. CLK/NDRV1 frequency has a 1x, 2x, or 4x ratio. See the Synchronizing Clock Output section. Internal Connection. Connect to ground. Internal function. Oscillator Timing Resistor Connection. Bypass RT with a 1nF capacitor to DGND. Connect a resistor from RT to DGND to set the internal oscillator. Digital Ground. Connect DGND to ground plane. Power Ground. Connect PGND to ground plane. Gate Driver 1. Connect NDRV1 to the gate of the external n-channel FET. Gate Driver 2. Connect NDRV2 to the gate of the external n-channel FET. Power-Supply Input. Bypass VCC to PGND with 0.1F||1F ceramic capacitors. Exposed Pad. Internally connected to DGND. Connect exposed pad to ground plane.
MAX5075
MAX5075
A (1x) B (2x) VCC 5V LDO C (4x) Q Q Q T-FF Q NDRV2 UVLO 3.5V VCC
NDRV1 CLK Q Q RT DGND OSC INTERNAL FUNCTION PGND
I.C.
Figure 1. MAX5075 Functional Diagram
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Push-Pull FET Driver with Integrated Oscillator and Clock Output MAX5075
Detailed Description
The MAX5075 is a +4.5V to +15V push-pull, current-fed topology driver subsystem with an integrated oscillator for use in 48V module power supplies. The MAX5075 features a programmable, accurate integrated oscillator with a synchronizing clock output that can be used to synchronize an external PWM stage. A single external resistor programs the internal oscillator frequency from 50kHz to 1.5MHz. The MAX5075 incorporates a dual MOSFET driver with 3A peak drive currents and a 50% duty cycle. The MOSFET driver generates complementary signals to drive external ground-referenced n-channel MOSFETs. The MAX5075 is available with a clock output frequency to MOSFET driver frequency ratios of 1x , 2x, and 4x.
Table 1. MAX5075 CLK Output Frequency
PART MAX5075A MAX5075B MAX5075C fCLK fOSC / 2 fOSC fOSC fNDRV1 fOSC / 2 fOSC / 2 fOSC / 4 fCLK to fSW RATIO 1 2 4
NDRV2
NDRV1 CLK OSC MAX5075A NDRV2
Internal Oscillator
An external resistor at RT programs the MAX5075 internal oscillator frequency from 50kHz to 1.5MHz. The MAX5075A/B NDRV1 and NDRV2 switching frequencies are one-half the programmed oscillator frequency with a nominal 50% duty cycle. The MAX5075C NDRV1 and NDRV2 switching frequencies are one-fourth the oscillator frequency. Use the following formula to calculate the internal oscillator frequency:
12
NDRV1 CLK OSC MAX5075B NDRV2
NDRV1 CLK
fOSC =
10 32 xRRT
OSC MAX5075C
where fOSC is the oscillator frequency and RRT is a resistor connected from RT to DGND in ohms. Place a 1nF capacitor from RT to DGND for stability and to filter out noise. Synchronizing Clock Output The MAX5075 provides a buffered clock output that can be used to synchronize the oscillator input of a PWM controller. CLK is powered from an internal 5V regulator and sources/sinks up to 10mA. The MAX5075 has internal CLK output frequency to NDRV1 and NDRV2 switching frequency ratios set to 1x, 2x, or 4x (Table 1). The MAX5075A has a CLK frequency to NDRV_ frequency ratio set to 1x. The MAX5075B has a CLK frequency to NDRV_ frequency ratio set to 2x and the MAX5075C has a CLK frequency to NDRV_ frequency ratio set to 4x. There is a typical 30ns delay from CLK to NDRV_ output.
Figure 2. MAX5075 CLK Timing Diagrams
Applications Information
Supply Bypassing
Pay careful attention to bypassing and grounding the MAX5075. Peak supply and output currents may exceed 3A when driving large MOSFETs. Ground shifts due to insufficient device grounding may also disturb other circuits sharing the same ground-return path. Any series inductance in the VCC, NDRV1, NDRV2, and/or GND paths can cause noise due to the very high di/dt when switching the MAX5075 with any capacitive load. Place one or more 0.1F ceramic capacitors in parallel as close to the device as possible to bypass VCC to PGND. Use a ground plane to minimize ground-return resistance and inductance. Place the external MOSFETs as close as possible to the MAX5075 to further minimize board inductance and AC path impedance.
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Push-Pull FET Driver with Integrated Oscillator and Clock Output
Power Dissipation
The power dissipation of the MAX5075 is a function of the sum of the quiescent current and the output current (either capacitive or resistive load). Maintain the sum of the currents so the maximum power dissipation limit is not exceeded. The power dissipation (PDISS) due to the quiescent switching supply current (ICCSW) can be calculated as: PDISS = VCC x ICCSW For capacitive loads, use the following equation to estimate the power dissipation: PLOAD = 2 x CLOAD x VCC2 x fNDRV_ where C LOAD is the capacitive load at NDRV1 and NDRV2, VCC is the supply voltage, and fNDRV_ is the MAX5075 NDRV_ switching frequency. Calculate the total power dissipation (PT) as follows: PT = PDISS + PLOAD
TOP VIEW
CLK I.C. RT DGND 1 2 3 4
*
Two AC current loops form between the device and the gate of the driven MOSFETs. The MOSFETs look like a large capacitance from gate to source when the gate pulls low. The current loop is from the MOSFET gate to NDRV1 and NDRV2 of the MAX5075, to PGND, and to the source of the MOSFET. When the gate of the MOSFET pulls high, the current is from the VCC terminal of the decoupling capacitor, to VCC of the MAX5075, to NDRV1 and NDRV2, and to the MOSFET gate and source. Both charging current and discharging current loops are important. Minimize the physical distance and the impedance in these AC current paths. Keep the device as close to the MOSFET as possible.
MAX5075
*
Pin Configuration
Layout Recommendations
The MAX5075 sources and sinks large currents that can create very fast rise and fall edges at the gate of the switching MOSFETs. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. Use the following PC board layout guidelines when designing with the MAX5075: * Place one or more 0.1F decoupling ceramic capacitors from V CC to PGND as close to the device as possible. Connect VCC and all ground pins to large copper areas. Place one bulk capacitor of 10F on the PC board with a low-impedance path to the VCC input and PGND of the MAX5075.
*EP
8 7
VCC NDRV2 NDRV1 PGND
MAX5075
6 5
MAX
*EXPOSED PADDLE CONNECTED TO DGND.
Chip Information
TRANSISTOR COUNT: 1335 PROCESS: BiCMOS
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Push-Pull FET Driver with Integrated Oscillator and Clock Output MAX5075
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 8L UMAX, EXPOSED PAD
21-0107
B
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
8L, MAX, EXP PAD.EPS

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